lstopo -v Machine (P#0 total=263792384KB DMIProductName=dead-beef-cafe-model DMIProductVersion=xx DMIBoardVendor="REDACTED" DMIBoardName=dead-beef-cafe-model DMIBoardVersion=xx-xxxxxx-xx DMIBoardAssetTag=Unknown DMIChassisVendor="REDACTED" DMIChassisType=xx DMIChassisVersion=xx-xxxxxx-x DMIChassisAssetTag=Unknown DMIBIOSVendor="REDACTEDSystems, Inc." DMIBIOSVersion= DMIBIOSDate=xx/xx/2018 DMISysVendor="REDACTED" Backend=Linux LinuxCgroup=/ OSName=Linux OSRelease=4.15.0-43-generic OSVersion="#46-Ubuntu SMP Thu Dec 6 14:45:28 UTC 2018" HostName=ln-sv-infr01 Architecture=x86_64 hwlocVersion=1.11.9 ProcessName=lstopo) NUMANode L#0 (P#0 local=131699752KB total=131699752KB) Package L#0 (P#0 CPUVendor=GenuineIntel CPUFamilyNumber=6 CPUModelNumber=85 CPUModel="Intel(R) Xeon(R) Gold 6132 CPU @ 2.60GHz" CPUStepping=4) L3Cache L#0 (size=19712KB linesize=64 ways=11 Inclusive=0) L2Cache L#0 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#0 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#0 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#0 (P#0) PU L#0 (P#0) PU L#1 (P#28) L2Cache L#1 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#1 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#1 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#1 (P#1) PU L#2 (P#1) PU L#3 (P#29) L2Cache L#2 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#2 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#2 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#2 (P#2) PU L#4 (P#2) PU L#5 (P#30) L2Cache L#3 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#3 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#3 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#3 (P#3) PU L#6 (P#3) PU L#7 (P#31) L2Cache L#4 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#4 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#4 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#4 (P#4) PU L#8 (P#4) PU L#9 (P#32) L2Cache L#5 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#5 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#5 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#5 (P#5) PU L#10 (P#5) PU L#11 (P#33) L2Cache L#6 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#6 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#6 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#6 (P#6) PU L#12 (P#6) PU L#13 (P#34) L2Cache L#7 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#7 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#7 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#7 (P#8) PU L#14 (P#7) PU L#15 (P#35) L2Cache L#8 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#8 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#8 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#8 (P#9) PU L#16 (P#8) PU L#17 (P#36) L2Cache L#9 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#9 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#9 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#9 (P#10) PU L#18 (P#9) PU L#19 (P#37) L2Cache L#10 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#10 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#10 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#10 (P#11) PU L#20 (P#10) PU L#21 (P#38) L2Cache L#11 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#11 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#11 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#11 (P#12) PU L#22 (P#11) PU L#23 (P#39) L2Cache L#12 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#12 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#12 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#12 (P#13) PU L#24 (P#12) PU L#25 (P#40) L2Cache L#13 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#13 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#13 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#13 (P#14) PU L#26 (P#13) PU L#27 (P#41) Bridge Host->PCI L#0 (P#0 buses=0000:[00-04]) PCI 8086:a1d2 (P#277 busid=0000:00:11.5 class=0106(SATA) PCIVendor="Intel Corporation" PCIDevice="Lewisburg SSATA Controller [AHCI mode]") "Intel Corporation Lewisburg SSATA Controller [AHCI mode]" PCI 8086:a186 (P#368 busid=0000:00:17.0 class=0104(RAID) PCIVendor="Intel Corporation" PCIDevice="Lewisburg SATA Controller [RAID mode]") "Intel Corporation Lewisburg SATA Controller [RAID mode]" Bridge PCI->PCI (P#448 busid=0000:00:1c.0 id=8086:a190 class=0604(PCI_B) buses=0000:[01-02] PCIVendor="Intel Corporation" PCIDevice="Lewisburg PCI Express Root Port #1") "Intel Corporation Lewisburg PCI Express Root Port #1" PCI 8086:1563 (P#4096 busid=0000:01:00.0 class=0200(Ether) PCIVendor="Intel Corporation" PCIDevice="Ethernet Controller 10G X550T") "Intel Corporation Ethernet Controller 10G X550T" Network L#0 (Address=8a:6d:22:f7:f2:87) "eno1" PCI 8086:1563 (P#4097 busid=0000:01:00.1 class=0200(Ether) PCIVendor="Intel Corporation" PCIDevice="Ethernet Controller 10G X550T") "Intel Corporation Ethernet Controller 10G X550T" Network L#1 (Address=8a:6d:22:f7:f2:87) "eno2" Bridge PCI->PCI (P#452 busid=0000:00:1c.4 id=8086:a194 class=0604(PCI_B) buses=0000:[03-04] PCIVendor="Intel Corporation" PCIDevice="Lewisburg PCI Express Root Port #5") "Intel Corporation Lewisburg PCI Express Root Port #5" Bridge PCI->PCI (P#12288 busid=0000:03:00.0 id=19a2:0120 class=0604(PCI_B) buses=0000:[04-04] PCIVendor="Emulex Corporation" PCIDevice="x1 PCIe Gen2 Bridge[Pilot4]") "Emulex Corporation x1 PCIe Gen2 Bridge[Pilot4]" PCI 102b:0522 (P#16384 busid=0000:04:00.0 class=0300(VGA) PCIVendor="Matrox Electronics Systems Ltd." PCIDevice="MGA G200e [Pilot] ServerEngines (SEP1)") "Matrox Electronics Systems Ltd. MGA G200e [Pilot] ServerEngines (SEP1)" GPU L#2 "controlD64" GPU L#3 "card0" Bridge Host->PCI L#4 (P#1 buses=0000:[17-1a]) Bridge PCI->PCI (P#94208 busid=0000:17:00.0 id=8086:2030 class=0604(PCI_B) buses=0000:[18-18] PCIVendor="Intel Corporation" PCIDevice="Sky Lake-E PCI Express Root Port 1A" PCISlot=0) "Intel Corporation Sky Lake-E PCI Express Root Port 1A" PCI 1000:0014 (P#98304 busid=0000:18:00.0 class=0104(RAID) PCIVendor="LSI Logic / Symbios Logic" PCIDevice="MegaRAID Tri-Mode SAS3516") "LSI Logic / Symbios Logic MegaRAID Tri-Mode SAS3516" Block(Disk) L#4 (LinuxDeviceID=8:0 Vendor=REDACTEDModel=RAID12G Revision=x.xx SerialNumber=deadbeefdeadbeefdeadbeefdead Type=Disk) "sda" Bridge PCI->PCI (P#94240 busid=0000:17:02.0 id=8086:2032 class=0604(PCI_B) buses=0000:[19-1a] PCIVendor="Intel Corporation" PCIDevice="Sky Lake-E PCI Express Root Port 1C" PCISlot=1) "Intel Corporation Sky Lake-E PCI Express Root Port 1C" PCI 8086:1572 (P#102400 busid=0000:19:00.0 class=0200(Ether) PCIVendor="Intel Corporation" PCIDevice="Ethernet Controller X710 for 10GbE SFP+") "Intel Corporation Ethernet Controller X710 for 10GbE SFP+" Network L#5 (Address=0a:16:67:1e:81:6d) "enp25s0f0" PCI 8086:1572 (P#102401 busid=0000:19:00.1 class=0200(Ether) PCIVendor="Intel Corporation" PCIDevice="Ethernet Controller X710 for 10GbE SFP+") "Intel Corporation Ethernet Controller X710 for 10GbE SFP+" Network L#6 (Address=0a:16:67:1e:81:6d) "enp25s0f1" PCI 8086:1572 (P#102402 busid=0000:19:00.2 class=0200(Ether) PCIVendor="Intel Corporation" PCIDevice="Ethernet Controller X710 for 10GbE SFP+") "Intel Corporation Ethernet Controller X710 for 10GbE SFP+" Network L#7 (Address=5e:d7:b9:f9:4a:88) "enp25s0f2" PCI 8086:1572 (P#102403 busid=0000:19:00.3 class=0200(Ether) PCIVendor="Intel Corporation" PCIDevice="Ethernet Controller X710 for 10GbE SFP+") "Intel Corporation Ethernet Controller X710 for 10GbE SFP+" Network L#8 (Address=5e:d7:b9:f9:4a:88) "enp25s0f3" Bridge Host->PCI L#7 (P#3 buses=0000:[5d-5e]) Bridge PCI->PCI (P#380928 busid=0000:5d:00.0 id=8086:2030 class=0604(PCI_B) buses=0000:[5e-5e] PCIVendor="Intel Corporation" PCIDevice="Sky Lake-E PCI Express Root Port 1A" PCISlot=2) "Intel Corporation Sky Lake-E PCI Express Root Port 1A" PCI 1c58:0023 (P#385024 busid=0000:5e:00.0 class=0108(NVMExp) PCIVendor="HGST, Inc.") "HGST, Inc." NUMANode L#1 (P#1 local=132092632KB total=132092632KB) Package L#1 (P#1 CPUVendor=GenuineIntel CPUFamilyNumber=6 CPUModelNumber=85 CPUModel="Intel(R) Xeon(R) Gold 6132 CPU @ 2.60GHz" CPUStepping=4) L3Cache L#1 (size=19712KB linesize=64 ways=11 Inclusive=0) L2Cache L#14 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#14 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#14 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#14 (P#0) PU L#28 (P#14) PU L#29 (P#42) L2Cache L#15 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#15 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#15 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#15 (P#1) PU L#30 (P#15) PU L#31 (P#43) L2Cache L#16 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#16 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#16 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#16 (P#2) PU L#32 (P#16) PU L#33 (P#44) L2Cache L#17 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#17 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#17 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#17 (P#3) PU L#34 (P#17) PU L#35 (P#45) L2Cache L#18 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#18 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#18 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#18 (P#4) PU L#36 (P#18) PU L#37 (P#46) L2Cache L#19 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#19 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#19 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#19 (P#5) PU L#38 (P#19) PU L#39 (P#47) L2Cache L#20 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#20 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#20 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#20 (P#6) PU L#40 (P#20) PU L#41 (P#48) L2Cache L#21 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#21 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#21 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#21 (P#8) PU L#42 (P#21) PU L#43 (P#49) L2Cache L#22 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#22 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#22 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#22 (P#9) PU L#44 (P#22) PU L#45 (P#50) L2Cache L#23 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#23 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#23 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#23 (P#10) PU L#46 (P#23) PU L#47 (P#51) L2Cache L#24 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#24 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#24 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#24 (P#11) PU L#48 (P#24) PU L#49 (P#52) L2Cache L#25 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#25 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#25 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#25 (P#12) PU L#50 (P#25) PU L#51 (P#53) L2Cache L#26 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#26 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#26 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#26 (P#13) PU L#52 (P#26) PU L#53 (P#54) L2Cache L#27 (size=1024KB linesize=64 ways=16 Inclusive=0) L1dCache L#27 (size=32KB linesize=64 ways=8 Inclusive=0) L1iCache L#27 (size=32KB linesize=64 ways=8 Inclusive=0) Core L#27 (P#14) PU L#54 (P#27) PU L#55 (P#55) depth 0: 1 Machine (type #1) depth 1: 2 NUMANode (type #2) depth 2: 2 Package (type #3) depth 3: 2 L3Cache (type #4) depth 4: 28 L2Cache (type #4) depth 5: 28 L1dCache (type #4) depth 6: 28 L1iCache (type #4) depth 7: 28 Core (type #5) depth 8: 56 PU (type #6) Special depth -3: 9 Bridge (type #9) Special depth -4: 11 PCI Device (type #10) Special depth -5: 9 OS Device (type #11) relative latency matrix between NUMANodes (depth 1) by logical indexes: index 0 1 0 1.000 2.100 1 2.100 1.000